1. Field
Example embodiments relate to a multi-chip package and a method of manufacturing the same. More particularly, example embodiments relate to a multi-chip package having sequentially stacked semiconductor chips, and a method of manufacturing the multi-chip package.
2. Description of the Related Art
Generally, semiconductor fabrication processes may be performed on a semiconductor substrate to form semiconductor chips. In order to mount each of the semiconductor chips on a main board, a packaging process may be performed on the semiconductor chip to form a semiconductor package.
In order to increase storage capacity of the semiconductor package, a multi-chip package including sequentially stacked semiconductor chips may be widely developed. An electrical connecting member such as a conductive wire, a plug, a conductive bump, etc., may be used for electrically connecting the stacked semiconductor chips with each other. In the multi-chip package having the plugs, the plugs may be connected with each other using a micro bump.
However, the micro bump is formed using complicated processes including attaching the semiconductor chip to a supporting substrate using an adhesive, and detaching the semiconductor chip from the supporting substrate.
Further, the adhesive including an insulating material may partially remain on the micro bump. The remaining adhesive may electrically disconnect the micro bump from the plug. Additionally, the micro bump may be formed by a reflow process, which is complicated and expensive.
Accordingly, an improved multi-chip package and associated manufacturing process is needed. Embodiments of the present inventive concepts address these and other limitations in the prior art.